1. Field of the Invention
The present invention relates to a calibration apparatus for a programmable comparator used in an IC (integrated circuit) tester which compares the electric current value (or electric voltage value) measured at an electric source pin of an IC and an arbitrary desired electric current value (or electric voltage value). This application is based on patent application, No. Hei 9-203611, filed in Japan, the content of which is incorporated herein by reference.
2. Description of the Related Art
An example of an IC tester is one that supplies an electrical source current or electrical source voltage from the IC tester to a power source pin of the IC which is the device under test. In this situation, for example, the electric current value actually supplied to the power source pin of the IC is one important parameter showing the characteristics of the IC as an electric current consumption. Therefore, in an IC tester, it is necessary to be able to test whether or not the electric current consumption of the IC is the expected value. In order to obtain this object, a programmable comparator for comparing the electric current value (or electric voltage value) measured, for example, at an IC power source pin, and an expected electric current value (or electric voltage value) is used. In addition, in this type of programmable comparator, as with any other type of measuring instruments and apparatus, and it is necessary that periodic calibration is carried out and it be able to make very precise comparisons of electric current values and electric voltage values at all times.
FIG. 4 is a block diagram showing the circuit structure of a calibration apparatus of a programmable comparator according to the related technology. As shown in the figure, this circuit can be roughly divided into the following function blocks: test controller 1, I/O (input/output) control circuit 2, power supply circuit 3, a current voltage conversion circuit 4, and a programmable comparator 5.
The test controller 1 directs the power supply circuit 3 via an I/O control circuit 2 to generate the desired electric current value. The test controller 1 may, for example, send an arbitrary digital code to a programmable comparator 5, compare the electric current value corresponding to this digital code to the electric current value the power supply circuit 3 supplies to the power supply point Ps using the current voltage conversion circuit 4 and the programmable comparators 5, and retrieve from the programmable comparators 5 the obtained result of the comparison. The detailed function of the test controller 1 will be explained further below.
The I/O control circuit 2 is a bidirectional buffer for transferring various data between the test controller 1, the power supply circuit 3, and the programmable comparator 5.
The power supply circuit 3 can supply an electric current having an electric current value range from the highest positive supplied current to the highest negative supplied current, and supplies to the power supply point Ps corresponding to the power supply pins of an IC, etc,. a current having an electric current value indicated by the test controller 1. As shown in the figure, this power supply circuit 3 comprises a voltage generator 3a, an output resistor 3b, a force amplifier 3c, a buffer 3d, a feedback resistor 3e, and a sense amplifier 3f. The voltage generator 3a outputs a voltage depending on the digital code sent from the test controller 1 via the I/O control circuit 2, and comprises DACs (digital/analog converters), etc. In addition, the output resistor 3b, and force amplifier 3c, and the feedback resistor 3e form a negative feedback amplifier. The output resistor 3b and the feedback resistor 3e are resistors for determining the gain of the negative feedback amplifier, and the force amplifier 3c is an operational amplifier which is a basic structural component of the negative feedback amplifier. In addition, the buffer 3d is a current amplification circuit, and is necessary because the force amplifier 3c cannot supply the output current required by the power supply circuit 3 by itself. The sense amplifier 3f is a voltage follower amplifier inserted in order to feed accurately the voltage in the power supply point Ps back to the negative feedback amplifier. That is, the power supply circuit 3 must accurately feed the voltage in the power supply point Ps back to the negative feedback amplifier because it is necessary to supply accurately a set voltage to the power supply point Ps. However, an accurate voltage is not fed back because electric current has flowed to the feedback path of the negative feedback amplifier, and thus a voltage follower amplifier having a high input impedance is inserted into the feedback path.
The current voltage conversion circuit 4 comprises an electric current detection resistor 4a for converting the electric current value supplied to the power supply point Ps to a voltage value, and a voltage detection amplifier 4b which amplifies a voltage value generated at both ends of this electric current detection resistor 4a and outputs it to the programmable comparator 5.
An electric current supplied by the power supply circuit 3 to the power supply point Ps is converted to a voltage value using the current voltage conversion circuit 4, and the programmable comparator 5 compares this voltage value and the voltage value which is a digital code supplied from the test controller 1 via the I/O control circuit 2 and converted into an analog voltage, and outputs the obtained result of the comparison from terminal Tc to the test controller 1. That is, by arbitrarily varying the digital code supplied from the test controller 1 to the programmable comparator 5, an arbitrary current value is compared with the current value that the power supply circuit 3 supplies to the power supply point Ps, and the size relationship between these electric current values can be detected. Moreover, this digital code is a signed binary that takes a positive or negative value, and more specifically, in the power supply circuit 3 can supply "largest negative supplied current".about."largest positive supplied current" corresponding to the range of "-FULL" code data.about."+FULL" code data.
In this programmable comparator 5, register 5a stores the digital code sent from the test controller 1. The DAC 5b converts to the analog voltage the digital code stored in register 5a. The DAC 5b has installed a gain adjustment terminal Tg and an offset adjustment terminal To for correcting the gain and offset in the conversion process, and the gain correction and offset correction are carried out depending on the analog voltage value sent to each of these terminals. Register 5c stores the digital code for gain adjustment sent to the gain adjustment DAC 5d from the test controller 1, and the gain adjustment DAC 5d converts the digital code into an analog voltage, which is sent to the gain adjustment terminal Tg of the DAC 5b. Similarly, register 5e stores the digital code for the offset adjustment sent to the offset adjustment DAC 5f from the test controller 1, and the offset adjustment DAC 5f converts this digital code into an analog voltage, and sends it to the offset adjustment terminal To of the DAC 5b. Moreover, the voltage generator 3a, the register 5a, the register 5c, and the register 5e are structured so that one among them is selected by an the address signal (selection signal) AD sent from the test controller 1. In addition, as explained above, while in the power supply circuit 3 the digital code from the test controller 1 for indicating the electric current value is set, the various digital codes are also set for each of the above-described registers. Next, the comparator 5g is provided with a terminal Tin1 into which the output voltage value of DAC 5b is input, and a terminal Tin2 into which the voltage value that the current voltage conversion circuit 4 detects is input. This comparator 5g compares the voltage values between both terminals, and outputs to the above-mentioned terminal Tc their size relationship. In addition, a variable resistor 5.sub.h is connected to the comparator 5.sub.g in order to compensate the offset that it produces itself.
The calibration of the programmable comparator 5 using the above-described circuit construction is carried out as follows. First, in order to carry out offset adjustment of the DAC 5b, the test controller 1 writes the lowest value of the digital code, the "-FULL" code data, to register 5a, and outputs this to the DAC 5b. Next, the test controller 1 writes the digital code of the offset adjustment to register 5e, applies this to the offset adjustment DAC 5f, and sends the voltage value corresponding to the written digital data to the offset adjustment terminal To of the DAC 5b. Additionally, the test controller 1 corrects the offset by adjusting the digital code written to register 5e so that the voltage value in the terminal Tin1 of the comparator 5.sub.g becomes the "largest negative voltage" of the output amplitude of the DAC 5b.
Next, in order to carry out gain adjustment of the DAC 5b, the test controller 1 writes the highest value of the digital code, the "+FULL" code data, to the register 5a, and outputs this to the DAC 5b. Next, the test controller 1 writes the digital code of the gain adjustment to the register 5c, outputs this to the gain adjustment DAC 5d, and sends the voltage value corresponding to the written digital code to the gain adjustment terminal Tg of the DAC 5b. Additionally, the test controller 1 corrects the gain by adjusting the written digital code written in register 5c so that the voltage value in the terminal Tin1 of the comparator 5.sub.g becomes the "largest positive voltage" of the output amplitude of the DAC 5b.
In addition to the above, the test controller 1 sends in advance to DAC 5b the digital code setting to zero the voltage input into the terminal Tin1 of the comparator 5g, and when the voltage value of the voltage sent to terminal Tin2 crosses "0", and varies slightly, the resistance value of the variable resistor 5h is adjusted so that in both terminals the size relationship of the voltage values sent from the comparator 5g is reversed. In this manner, the offset adjustment of comparator 5g is carried out.
Thus, in the above-described calibration apparatus of the programmable; comparator, the DACs and registers for the respective offset and gain are necessary in order to adjust the offset and gain of the DAC 5b. In addition, in order to adjust the offset of the comparator 5g, a variable resistor 5h for the offset adjustment is necessary. For these reasons, in addition to the circuit structure of the calibration apparatus being complicated, there is the problem that the apparatus itself becomes large. In addition, as described above, because the digital code sent to the programmable comparator 5 is either "+FULL" code data or "-FULL" code data, there is also the problem that even when offset adjustment and gain adjustment are carried out, the correction is not very precise. Furthermore, in the circuit structure shown in the figure, when the current voltage conversion circuit 4 converts the electric current flowing to the electric current detection resistor 4a to voltage, the conversion error produces and appears as this kind of output error of the comparator 5g. Therefore, in order to decrease the output error of this kind of comparator 5g, it is necessary to use high precision parts for each part forming the current voltage conversion circuit 4, and this has the drawback that these parts alone make the apparatus become expensive.